scottpandClaude Fable 5
037af33154
- Extract all decode/decrypt into a dependency-free C99 core
(include/victronble.h, src/victronble_core.c): victronble_decode(),
is_product_adv/key_matches pre-filters, NAN sentinels, LE accessors.
- AES-128-CTR behind a hook: weak-symbol bundled tiny-AES default,
runtime override (victronble_set_aes_ctr) for PSA/mbedTLS/hardware.
- Arduino VictronBLE class becomes a thin wrapper over the core
(registry + nonce dedup + rate limit); public C++ API unchanged,
NAN converted back to the legacy 0 convention.
- Host test vectors (tests/vectors): openssl-generated ciphertext,
independent of the bundled AES; all five payload shapes + negatives.
- Zephyr module: zephyr/module.yml + Kconfig (CONFIG_VICTRONBLE) +
observer backend (victronble_zephyr.{h,c}) — scan cb pre-filters and
queues, dedicated decode thread, listener callbacks, slow passive
scan defaults, stats counters. docs/ZEPHYR_PORT.md records the plan.
- library.properties: fix URL (gitea, not the nonexistent GitHub).
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
130 lines
4.5 KiB
Python
130 lines
4.5 KiB
Python
#!/usr/bin/env python3
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"""Generate test_vectors.h for the victronble core host tests.
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Plaintext payloads are packed here from human-readable field values
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(mirroring Victron's Extra Manufacturer Data layouts) and encrypted with
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the openssl CLI — an implementation independent of the library's bundled
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tiny-AES — so the vectors cross-check the AES-CTR semantics as well as
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the parsers. The generated header is committed; python/openssl are only
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needed to regenerate it.
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"""
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import subprocess
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from pathlib import Path
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COMPANY_ID = 0x02E1
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PRODUCT_ADV = 0x10
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KEY = bytes.fromhex("0df4d0395b7d5d4f5a0d0af52e1b4c1e")
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def aes_ctr(key: bytes, nonce: int, plaintext: bytes) -> bytes:
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iv = bytes([nonce & 0xFF, (nonce >> 8) & 0xFF] + [0] * 14)
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return subprocess.run(
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["openssl", "enc", "-aes-128-ctr", "-K", key.hex(), "-iv", iv.hex(),
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"-nopad"],
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input=plaintext, capture_output=True, check=True).stdout
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def frame(record_type: int, model_id: int, readout: int, nonce: int,
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plaintext: bytes, key: bytes = KEY) -> bytes:
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head = bytes([COMPANY_ID & 0xFF, COMPANY_ID >> 8, PRODUCT_ADV,
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model_id & 0xFF, model_id >> 8, readout, record_type,
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nonce & 0xFF, (nonce >> 8) & 0xFF, key[0]])
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return head + aes_ctr(key, nonce, plaintext)
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def le16(v: int) -> bytes:
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return bytes([v & 0xFF, (v >> 8) & 0xFF])
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def pad21(b: bytes) -> bytes:
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assert len(b) <= 21
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return b + bytes(21 - len(b))
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def pack_bits(fields):
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"""fields: list of (value, width). LSB-first bit packing."""
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total = sum(w for _, w in fields)
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out = bytearray((total + 7) // 8)
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bit = 0
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for value, width in fields:
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for i in range(width):
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if (value >> i) & 1:
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out[(bit + i) >> 3] |= 1 << ((bit + i) & 7)
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bit += width
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return bytes(out)
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# --- Payloads ---------------------------------------------------------------
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# Solar charger: bulk, no error, 13.24 V, 5.4 A, 1.20 kWh today, 340 W,
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# no load output (9-bit 0x1FF).
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solar = pad21(bytes([3, 0]) + le16(1324) + le16(54) + le16(120) + le16(340) +
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le16(0x1FF))
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# Battery monitor: TTG 600 min, 12.80 V, alarms lowV|lowSOC, aux mode 2
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# (temperature 25.00 C = 29815 * 0.01 K), current -2.5 A, consumed 50.0 Ah,
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# SOC 85.5 %.
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batmon = pad21(pack_bits([
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(600, 16), # TTG minutes
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(1280, 16), # voltage, 0.01 V
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(0x0005, 16), # alarm bitmask
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(29815, 16), # aux raw (0.01 K)
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(2, 2), # aux mode = temperature
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(-2500 & 0x3FFFFF, 22), # current, 0.001 A
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(500, 20), # consumed, 0.1 Ah
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(855, 10), # SOC, 0.1 %
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]))
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# Inverter: inverting, 25.86 V, -12.34 A, -230 W, overload alarm.
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inverter = pad21(bytes([9, 0]) + le16(2586) + le16(-1234 & 0xFFFF) +
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((-230) & 0xFFFFFF).to_bytes(3, "little") + bytes([0x08]))
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# DC-DC converter: float, no error, in 25.30 V, out 13.31 V, 7.65 A.
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dcdc = pad21(bytes([5, 0]) + le16(2530) + le16(1331) + le16(765))
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# AC charger: absorption, no error, out1 14.40 V / 10.0 A, out2/3 absent,
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# temp 35 C, AC current 1.2 A.
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accharger = pad21(pack_bits([
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(4, 8), (0, 8),
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(1440, 13), (100, 11),
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(0x1FFF, 13), (0x7FF, 11),
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(0x1FFF, 13), (0x7FF, 11),
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(35 + 40, 7),
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(12, 9),
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]))
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VECTORS = [
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("solar", frame(0x01, 0xA060, 0x00, 0x1234, solar)),
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("batmon", frame(0x02, 0xA389, 0x00, 0xBEEF, batmon)),
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("inverter", frame(0x03, 0xA2FA, 0x00, 0x0001, inverter)),
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("dcdc", frame(0x04, 0xA3C0, 0x00, 0xFFFF, dcdc)),
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("accharger", frame(0x08, 0xA339, 0x00, 0x00C8, accharger)),
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# Multi RS record type decodes via the inverter parser.
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("multirs", frame(0x0B, 0xA512, 0x00, 0x0042, inverter)),
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# GX device: recognised record type, no decoder -> ERR_UNSUPPORTED.
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("gx", frame(0x07, 0xA100, 0x00, 0x0007, pad21(b""))),
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]
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def main():
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out = Path(__file__).with_name("test_vectors.h")
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lines = [
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"/* Generated by gen_vectors.py — do not edit by hand.",
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" * Ciphertext produced with `openssl enc -aes-128-ctr`, independent",
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" * of the library's bundled AES. */",
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"",
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f'static const char VEC_KEY_HEX[] = "{KEY.hex()}";',
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"",
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]
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for name, data in VECTORS:
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arr = ", ".join(f"0x{b:02x}" for b in data)
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lines.append(f"static const uint8_t VEC_{name.upper()}[] = {{ {arr} }};")
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lines.append("")
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out.write_text("\n".join(lines))
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print(f"wrote {out} ({len(VECTORS)} vectors)")
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if __name__ == "__main__":
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main()
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